One type of prior non-volatile computer memory is the flash erasable programmable read-only memory ("flash EPROM"). The flash EPROM can be programmed by a user, and once programmed, the flash-EPROM retains its data until erased. Electrical erasure of the flash EPROM erases the entire contents of memory of the device in one relatively rapid operation. The flash EPROM may then be programmed with new code.
One prior flash EPROM is the 28F256 Complementary Metal Oxide Semiconductor ("CMOS") Flash Memory sold by Intel Corporation of Santa Clara, Calif., which is a 256 Kilobit flash-EPROM. The 28F256 flash memory includes a command register to manage electrical erasure and reprogramming. Commands are written to the command register from a controlling microprocessor using standard microprocessor write timings. The command register contents serve as input to an internal state-machine that controls erase and programming circuitry.
On the 28F256 flash memory, a two-step sequence of operations is used to initiate erasure of the flash memory. First, a set-up erase operation is performed by writing the hexadecimal number 20 to the command register of the flash memory. The set-up erase operation is a command-only operation that stages the device for electrical erasure of all bytes in the memory array of the flash memory.
Second, the hexadecimal number 20 is again written to the command register, and this represents an erase command. An erase operation begins with the rising edge of the write-enable pulse that permits this erase command to be written to the command register.
The erase operation is terminated by the rising edge of the next write-enable pulse that accompanies the next command that is written to the command register. If the time between initiation and termination of the erase operation on the 28F256 flash memory is too long, the memory array can be damaged by the high voltage V.sub.pp that is applied to it for erasure due to the loss of too much charge. In other words, if the time between the rising edge of the write-enable pulse of the erase command and the rising edge of the write-enable pulse of the next command written to the command register is too long, the flash memory can be damaged.
On the 28F256 flash memory, programming is initiated by a program command that follows a program set-up command. The programming operation is terminated by the writing of subsequent command to the command register. If the time between initiation and termination of the programming operation on the 28F256 flash memory is too long, the flash memory can be damaged by the high voltage V.sub.pp used for programming due to the loss of too much charge.
One disadvantage of this prior flash memory is that the flash memory relies upon the controlling microprocessor to send the subsequent verify commands to end the respective erase and program operations, but sometimes the microprocessor either does not send the proper signal, or else sends the proper signal too late. The result is that the danger exists that the high voltage V.sub.pp will be applied to the flash memory for too long a time, possibly resulting in damage to the flash memory.
The controlling microprocessor might erroneously fail to terminate the erase operation or the programming operation for a number of reasons. For example, there might be a user software error in the algorithm for the controlling processor. As another example, a power failure might cause a processor execution error.